Considerations for Massively Parallel Unix Systems On the Nyu Ultracomputer And
Considerations for Massively Parallel Unix Systems On the Nyu Ultracomputer And
Jan Edler
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2. Machine Architecture In this section we review the architectural model on which the Ultracomputer is based, and illustrate the power of this model. Although this idealized machine is not physically realizable, a close approximation can be built. Elements of the actual machine design are briefly described in order to illustrate integrated hardware/software mechanisms for bottleneck-free coordination of a very large number of processors. The reader is referred to Gottlieb et al. [83b], Edler e...t al. [85], and the references therein for further details. 2. 1. Paracomputers An idealized parallel processor, dubbed a "paracomputer" by Schwartz [80] and classified as a WRAM by Borodin and Hopcroft [82], consists of a nimiber of autonomous processing elements (PEs) sharing a central memory that they are permitted to read or write in a single cycle. In particular, simultaneous reads and writes directed at the same memory cell are effected in one cycle. Page 2 We augment the paracomputer model with the "fetch-and-add" (F&A) operation, a powerful interprocessor cx)ordination primitive that permits highly concurrent execution of operating system algorithms and application programs (see Gottlieb and Kruskal [81]).
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