The Structure of the Puma Computer Systems Overview And the Central Processor
The Structure of the Puma Computer Systems Overview And the Central Processor
Ralph Grishman
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The P register is a counter — it can be incremented, decremented, or set from the low 20 bits of the AC register. The P regis- ter can be directly read by the minicomputer. The MA register holds the address for memory references. It can be loaded from the output of the P register or from the low 20 bits of AC. For PUMA serial number 2, some additional logic was included in the address path. This logic is controlled from the memory switch and so is invisible at the PUMA micro- program level. Two... registers have been added for relocation and memory protection: a reference address (RA) register and a field length (FL) register. The output of the MA register is continuously compared to FL; an address out of range signal is sent to the memory switch if MA ^ FL. The output of MA is added to RA to obtain the absolute memory address, which is sent to the memory switch. Both RA and FL can be set only by 18 the minicomputer through the memory switch. Finally, to reduce the number of data paths leaving the PUMA, the absolute memory address, P, RA, and FL registers are multiplexed onto a single 20-bit data path under control of the memory switch.
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